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 IC61LV256
Document Title
32K x 8 Hight Speed SRAM with 3.3V
Revision History
Revision No
0A 0B
History
Initial Draft Add Pb-free parts
Draft Date
April 19,2002 November 28,2003
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
1
IC61LV256
32K x 8 HIGH SPEED CMOS STATIC RAM
FEATURES
* High-speed access times: -- 8, 10, 12, 15 ns * Automatic power-down when chip is deselected * CMOS low power operation -- 345 mW (max.) operating -- 7 mW (max.) CMOS standby * TTL compatible interface levels * Single 3.3V power supply * Fully static operation: no clock or refresh required * Three-state outputs
DESCRIPTION The ICSI IC61LV256 is a very high-speed, low power, 32,768-word by 8-bit static RAM. It is fabricated using ICSI's
high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns maximum. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 600 W (typical) with CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory. The IC61LV256 is available in the JEDEC standard 28-pin, 300mil SOJ and the 8*13.4mm TSOP-1 package.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
256 X 1024 MEMORY ARRAY
VCC GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE OE WE CONTROL CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. (c) Copyright 2000, Integrated Circuit Solution Inc.
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Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
IC61LV256
PIN CONFIGURATION
28-Pin SOJ
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3
PIN CONFIGURATION
8x13.4mm TSOP-1
OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3
22 23 24 25 26 27 28 1 2 3 4 5 6 7
21 20 19 18 17 16 15 14 13 12 11 10 9 8
A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2
PIN DESCRIPTIONS
A0-A14 CE OE WE I/O0-I/O7 Vcc GND Address Inputs Chip Enable Input Output Enable Input Write Enable Input Input/Output Power Ground
TRUTH TABLE
Mode Not Selected (Power-down) Output Disabled Read Write WE X H H L CE H L L L OE X H L X I/O Operation High-Z High-Z DOUT DIN Vcc Current ISB1, ISB2 ICC ICC ICC
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VCC VTERM TBIAS TSTG PD IOUT Parameter Power Supply Voltage Relative to GND Terminal Voltage with Respect to GND Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Value -0.5 to +4.6 -0.5 to +4.6 -10 to +85 -45 to +90 -65 to +150 1 20 Unit V V C C W mA
Com. Ind.
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
3
IC61LV256
OPERATING RANGE
Range Commercial Industrial Ambient Temperature 0C to +70C -40C to +85C Speed 8, 10, 12 15 All VCC 3.3V, +10%, -5% 3.3V 10% 3.3V + 10%, -5%
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter VOH VOL VIH VIL ILI ILO Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage(1) Input Leakage Output Leakage GND VIN VCC GND VOUT VCC, Outputs Disabled Com. Ind. Com. Ind. Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 8.0 mA Min. 2.4 -- 2.2 -0.3 -1 -5 -1 -5 Max. -- 0.4 VCC + 0.3 0.8 1 5 1 5 Unit V V V V A A
Notes: 1. VIL (min.) = -0.3V (DC); VIL (min.) = -2.0V (pulse width 2.0 ns). VIH (max.) = VCC + 0.5V (DC); VIH (max.) = Vcc + 2.0V (pulse width 2.0 ns). 2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-8 ns Sym. Parameter ICC ISB1 Vcc Dynamic Operating Supply Current TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) Test Conditions VCC = Max., CE = VIL IOUT = 0 mA, f = fMAX VCC = Max., VIN = VIH or VIL CE VIH, f = 0 VCC = Max., CE VCC - 0.2V, VIN VCC - 0.2V, or VIN 0.2V, f = 0 Com. Ind. Com. Ind. Com. Ind.
Min. Max.
-10 ns
Min. Max.
-12 ns
Min. Max.
-15 ns
Min. Max. Unit
-- 120 -- 130 -- 25 -- 30 --2 --5
-- 110 -- 120 -- 25 -- 30 --2 --5
-- 100 -- 110 -- 25 -- 30 --2 --5
-- 90 -- 100 -- 25 -- 30 --2 --5
mA mA
ISB2
mA
Notes: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1,2)
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 5 Unit pF pF
Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25C, f = 1 MHz, Vcc = 3.3V.
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Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
IC61LV256
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-8 ns Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CE Access Time OE Access Time
(2)
-10 ns
Min. Max.
-12 ns
Min. Max.
-15 ns
Min. Max. Unit
Min. Max.
tRC tAA tOHA tACE tDOE tHZOE tLZCE tPU(3) tPD
(4)
8 -- 2 -- -- 0 -- 3 -- 0 --
-- 8 -- 8 4 -- 4 -- 4 -- 8
10 -- 2 -- -- 0 -- 3 -- 0 --
-- 10 -- 10 5 -- 5 -- 5 -- 10
12 -- 2 -- -- 0 -- 3 -- 0 --
-- 12 -- 12 6 -- 5 -- 6 -- 12
15 -- 2 -- -- 0 -- 3 -- 0 --
-- 15 -- 15 7 -- 6 -- 7 -- 15
ns ns ns ns ns ns ns ns ns ns ns
tLZOE(2) OE to Low-Z Output
OE to High-Z Output CE to Low-Z Output CE to Power-Up CE to Power-Down
(2)
tHZCE(2) CE to High-Z Output
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 200 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested.
AC TEST CONDITIONS
Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1 and 2
AC TEST LOADS
319 3.3V
3.3V 319
OUTPUT 30 pF Including jig and scope 353
OUTPUT 5 pF Including jig and scope 353
Figure 1. Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
Figure 2. 5
IC61LV256
AC WAVEFORMS READ CYCLE NO. 1(1,2)
t RC
ADDRESS
t AA t OHA
DOUT
PREVIOUS DATA VALID
t OHA
DATA VALID
READ CYCLE NO. 2(1,3)
t RC
ADDRESS
t AA
OE
t OHA
t DOE
CE
t HZOE
t LZOE t ACE t LZCE t HZCE
DATA VALID
DOUT
HIGH-Z
Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions.
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Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
IC61LV256
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
-8 ns Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time
(4)
-10 ns
Min. Max.
-12 ns
Min. Max.
-15 ns
Min. Max. Unit
Min. Max.
tWC tSCE tAW tHA tSA tPWE tSD tHD tLZWE
(3)
8 7 7 0 0 7 4.5 0 -- 0
-- -- -- -- -- -- -- -- 3.5 --
10 8 8 0 0 10 5 0 -- 0
-- -- -- -- -- -- -- -- 4 --
12 8 8 0 0 12 6 0 -- 0
-- -- -- -- -- -- -- -- 6 --
15 10 10 0 0 15 7 0 -- 0
-- -- -- -- -- -- -- -- 7 --
ns ns ns ns ns ns ns ns ns ns
WE Pulse Width Data Setup to Write End Data Hold from Write End WE HIGH to Low-Z Output
tHZWE(3) WE LOW to High-Z Output
Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 3. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 4. Tested with OE HIGH.
AC WAVEFORMS WRITE CYCLE NO. 1 (CE Controlled, OE is HIGH or LOW) (1 )
t WC
ADDRESS
VALID ADDRESS
t SA
CE
t SCE
t HA
WE
t AW t PWE1 t PWE2 t HZWE t LZWE
HIGH-Z
DOUT
DATA UNDEFINED
t SD
DIN
t HD
DATAIN VALID
Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
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IC61LV256
WRITE CYCLE NO. 2 (WE Controlled, OE is HIGH During Write Cycle) (1,2)
t WC
ADDRESS
VALID ADDRESS
t HA
OE
CE
LOW
t AW t PWE1
WE
t SA
DOUT
DATA UNDEFINED
t HZWE
HIGH-Z
t LZWE
t SD
DIN
t HD
DATAIN VALID
WRITE CYCLE NO. 3 (WE Controlled, OE is LOW During Write Cycle) (1)
t WC
ADDRESS
VALID ADDRESS
OE CE
LOW
t HA
LOW
t AW t PWE2
WE
t SA
DOUT
DATA UNDEFINED
t HZWE
HIGH-Z
t LZWE
t SD
DIN
t HD
DATAIN VALID
Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE > VIH.
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Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
IC61LV256
ORDERING INFORMATION Commercial Range: 0C to +70C
Speed (ns) 8 10 12 15 Order Part No. IC61LV256-8T IC61LV256-8J IC61LV256-10T IC61LV256-10J IC61LV256-12T IC61LV256-12J IC61LV256-15T IC61LV256-15J Package 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ
ORDERING INFORMATION Industrial Range: -40C to +85C
Speed (ns) 8 10 12 15 Order Part No. IC61LV256-8TI IC61LV256-8JI IC61LV256-10TI IC61LV256-10JI IC61LV256-12TI IC61LV256-12JI IC61LV256-15TI IC61LV256-15JI Package 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ
ORDERING INFORMATION (Pb-free) Commercial Range: 0C to +70C
Speed (ns) 8 10 12 15 Order Part No. IC61LV256-8TG IC61LV256-8JG IC61LV256-10TG IC61LV256-10JG IC61LV256-12TG IC61LV256-12JG IC61LV256-15TG IC61LV256-15JG Package 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ
ORDERING INFORMATION (Pb-free) Industrial Range: -40C to +85C
Speed (ns) 8 10 12 15 Order Part No. IC61LV256-8TIG IC61LV256-8JIG IC61LV256-10TIG IC61LV256-10JIG IC61LV256-12TIG IC61LV256-12JIG IC61LV256-15TIG IC61LV256-15JIG Package 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ 8*13.4mm TSOP-1 300mil SOJ
Integrated Circuit Solution Inc.
HEADQUARTER: NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, TAIWAN, R.O.C. TEL: 886-3-5780333 Fax: 886-3-5783000 BRANCH OFFICE: 7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD, HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C. TEL: 886-2-26962140 FAX: 886-2-26962252 http://www.icsi.com.tw
Integrated Circuit Solution Inc.
AHSR027-0B 11/28/2003
9


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